HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 730

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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17.3.2
The status register (SDSR) is a 16-bit register that can be read and written to by the CPU. Output
from TDO is possible for SDSR, but serial data cannot be written to SDSR via TDI. The SDTRF
bit is output by means of a 1-bit shift. In the case of a 2-bit shift, the SDTRF bit is first output,
followed by a reserved bit.
SDSR is initialized by TRST signal input, but is not initialized by a reset or in standby mode.
Bits 15 to 1—Reserved: Bits 15 to 11 and 9 to 1 always read 0, and the write value should always
be 0. Bit 10 always reads 1, and the write value should always be 1.
Bit 0—Serial Data Transfer Control Flag (SDTRF): Indicates whether H-UDI registers can be
accessed by the CPU. The SDTRF bit is reset by the TRST signal , but is not initialized by a reset
or in standby mode.
Bit 0: SDTRF
0
1
Initial value:
Initial value:
Status Register (SDSR)
R/W:
R/W:
Bit:
Bit:
Description
Serial transfer to SDDR has ended, and SDDR can be accessed
Serial transfer to SDDR in progress
15
0
R
7
0
R
14
0
R
6
0
R
13
0
R
5
0
R
12
0
R
4
0
R
11
1
R
3
0
R
10
1
R
2
0
R
9
0
R
1
0
R
(Initial value)
SDTRF
R/W
8
1
R
0
1
719

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