HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 90

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Table 2.18 Field B ALU Operation Instructions, Multiplication Instructions (cont)
2.5
The instructions are divided into three groups: CPU instructions executed by the CPU core, DSP
data transfer instructions executed by the DSP unit, and DSP operation instructions. There are a
number of CPU instructions for supporting the DSP functions. The instruction set is explained
below in terms of each of the three groups.
72
Notes: 1. System reserved code
Conditional
instructions
Category
operand
three
2. (if cc): DCT (DC bit true), DCF (DC bit false), or none (unconditional instruction)
Instruction Set
(if cc) PXOR Sx, Sy, Dz
(if cc) PSUB Sx, Sy, Dz
(if cc) PADD Sx, Sy, Dz
(if cc) PAND Sx, Sy, Dz
(if cc) PSTS MACH, Dz
(if cc) PLDS Dz, MACH
(if cc) PSHL Sx, Sy, Dz
(if cc) PSHA Sx, Sy, Dz
(if cc) PSTS MACL, Dz
(if cc) PLDS Dz, MACL
(if cc) POR Sx, Sy, Dz
(if cc) PDMSB Sx, Dz
(if cc) PDMSB Sy, Dz
(if cc) PCOPY Sx, Dz
(if cc) PCOPY Sy, Dz
(if cc) PDEC Sx, Dz
(if cc) PNEG Sx, Dz
(if cc) PNEG Sy, Dz
(if cc) PDEC Sy, Dz
(if cc) PINC Sx, Dz
(if cc) PINC Sy, Dz
(if cc) PCLR Dz
Reserved *
Mnemonic
Reserved
Reserved
Reserved
Reserved
2
31–27
1
1
26
0
25–16
Field A
15
1 1
14 13 12
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
11
0 *
0
0
1
1
1
1
10 9
0
1
0
1
0
1
10:DCT
Uncon-
11:DCF
0
0
dition
if cc
if cc
01:
8 7 6 5 4 3 2 1 0
0
0

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