HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 592

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Bit 7—IrDA Mode (IRMOD): Selects operation as an IrDA serial communication interface.
Bit 7: IRMOD
0
1
Note: * When operation as an IrDA interface is selected, bit 7 (C/A) of the serial mode register
Bit 6—Output Pulse Width Select (PSEL): Selects either 3/16 of the bit length set by bits ICK3 to
ICK0 in the serial mode register (SCSMR), or 3/16 of the bit length corresponding to the selected
baud rate, as the IrDA output pulse width. The setting is shown together with bits 6 to 3 (ICK3 to
ICK0) of the serial mode register (SCSMR).
Bit 6:
ICK3
ICK3
Don’t
care
Note: A fixed clock pulse signal, IRCLK, must be generated by multiplying the P clock by 1/2 N +
Bit 5—IrDA Receive Data Inverse (RIVS): Allows inversion of the receive data polarity to be
selected in IrDA communication.
Bit 5: RIVS
0
1
Note: Make the selection according to the characteristics of the IrDA modulation/demodulation
Bits 4 to 0—Reserved: These bits are always read as 0. The write value should always be 0.
Serial Mode Register (SCSMR)
Initial value:
(SCSMR) must be cleared to 0.
2 (where N is determined by the value set in ICK3 to ICK0). For details, see section 14.3.6
Pulse Width Selection.
module.
Bit 5:
ICK2
ICK2
Don’t
care
R/W:
Bit:
Bit 4:
ICK1
ICK1
Don’t
care
IRMOD
Description
Operation as SCIF is selected
Operation as IrDA is selected*
Description
Receive data polarity inverted in reception
Receive data polarity not inverted in reception
R/W
7
0
Bit 3:
ICK0
ICK0
Don’t
care
PSEL
R/W
6
0
SCIMR
Bit 2:
PSEL
1
0
RIVS
R/W
5
0
Description
Pulse width: 3/16 of bit length set in bits ICK3 to
ICK0
Pulse width: 3/16 of bit length set in SCBRR
4
0
R
3
0
R
2
0
R
1
0
R
(Initial value)
(Initial value)
(Initial value)
0
0
R
579

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