HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 423

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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9.3.6
The SH7615 enables a low-power-consumption system to be constructed by selecting or
combining three functions: a module standby function that halts the operation of unnecessary on-
chip modules, a sleep mode that halts CPU functions, and a standby function that halts all the
chip’s functions. Details of each operating mode are given in section 20, Power-Down State. Here,
features and points for attention when these functions are used in combination with the Ethernet
controller are described.
Sleep Mode: In sleep mode, the operation of the CPU and DSP is halted. The EtherC, on-chip
supporting functions, and external pins continue to operate. Recovery from sleep mode can be
carried out by means of an interrupt from the EtherC or a supporting module, or a reset. In order to
control external pins and the WOL pin by means of Magic Packet reception, the relevant pins must
be set beforehand.
Note: In order to specify recovery by means of a magic packet, supporting function interrupt
Standby Mode: In standby mode, the on-chip oscillation circuit is halted. Consequently, the clock
is not supplied to the EtherC, and interrupts from the EtherC and other supporting modules cannot
be reported. It is therefore not possible to restore normal operation by these means, and so the
WOL function cannot be used.
Notes: This mode can be selected to halt all functions including the EtherC. However, an NMI
Module Standby Mode: Module standby mode allows individual supporting modules to be run or
halted. However, due to the nature of its function, the operation of the EtherC cannot be stopped.
During normal operation, module standby mode can be used to halt unnecessary supporting
functions. The CPU and DSP continue to operate in this mode.
sources should be masked before sleep mode is entered. See section 9.3.4, Magic Packet
Reception, for the setting procedure.
interrupt, power-on reset, or manual reset is necessary in order to restore normal operation.
When the SH7615 has been placed in standby mode, the CPU, DSP, and bus state
controller are among the functions halted. When DRAM is connected, refreshing is also
halted, and therefore initialization of memory, etc., is necessary after recovery, in the same
way as in a reset.
CPU Operating Mode and Ethernet Controller Operation
407

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