HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 621

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

608
No
No
from SCFRDR, and clear RDF
Read ORER flag in SC2SSR
Read RDF flag in SC1SSR
Clear RE bit to 0 in SCSCR
flag to 0 in SC1SSR
Read receive data
All data received?
Start of reception
End of reception
Initialization
Figure 14.20 Sample Serial Reception Flowchart (1)
ORER = 1?
RDF = 1?
No
Yes
Yes
Error handling
Yes
1
3
4
2
1. PFC initialization: Set the RxD pin,
2. Receive error handling: If a
3. SCIF status check and receive
4. Serial reception continuation
and the SCK pin if necessary, with
the PFC.
receive error occurs, read the
ORER flag in SC2SSR, and after
performing the appropriate error
handling, clear the ORER flag to
0. Transmission/reception cannot
be resumed if the ORER flag is
set to 1.
data read: Read the serial status 1
register (SC1SSR) and check that
RDF = 1, then read receive data
from the receive FIFO data
register (SCFRDR) and clear the
RDF flag to 0. Transition of the
RDF flag from 0 to 1 can also be
identified by an RXI interrupt.
procedure: To continue serial
reception, read at least the receive
trigger set number of data bytes
from SCFRDR, and write 0 to the
RDF flag after reading 1 from it.
The number of receive data bytes
in SCFRDR can be ascertained by
reading the lower 8 bits of the
FIFO data count register
(SCFDR). (The RDF bit is cleared
automatically when the DMAC is
activated by an RXI interrupt and
the SCFRDR value is read.)