AM79C940JC/W AMD [Advanced Micro Devices], AM79C940JC/W Datasheet - Page 76

• Manufacturer Part Number: AM79C940JC/W
• Manufacturer: AMD [Advanced Micro Devices]

Programmer’s Register Model
76
Addr Mnemonic
0
1
2
3
4
5
6
7
RCVFIFO
XMTFIFO
XMTRC
FIFOFC
XMTFC
XMTFS
RCVFC
RCVFS
Receive FIFO–16 bits
Transmit FIFO–16 bits
Transmit Frame Control
80
08
01
Transmit Frame Status
80
40
20
10
08
04
02
01
80
40
20
10
0F
Receive Frame Control
08
04
01
Receive Frame Status–4 bytes–read in 4 read cycles
RFS0
RFS1
RFS2
RFS3
FIFO Frame Count
F0
0F
RCVCNT [7:0] Receive Message Byte Count
RCVSTS, RCVCNT [11:8]–Receive Status & Receive Msg Byte Count MSBs
RNTPC [7:0]
RCVCC [7:0]
DRTRY
DXMTFC
APADXMT
XMTSV
UFLO
LCOL
MORE
ONE
DEFER
LCAR
RTRY
EXDEF
–
–
–
LLRCV
M/R
ASTRPRCV
80
40
20
10
0F
XMTRC [3:0]
RCVFC
XMTFC
Disable Transmit FCS
Auto Pad Transmit
Transmission was deferred
4-bit Transmit Retry Count
Disable Retry
Transmit Status Valid
Late Collision
Underflow
Loss of Carrier
Transmit aborted after 16 attempts
Low Latency Receive
Match/Reject for external address detection
Auto Strip Receive–Strips pad and FCS from
Receive Frame Count–# of RCV frames in FIFO
Transmit Frame Count–# of XMT frames in FIFO
MORE than one retry was needed
Exactly ONE retry occurred
Excessive Defer
received frames
Runt Packet Count (since last successful reception)
OFLO
CLSN
FRAM
FCS
Receive Collision Count (since last successful
reception)
RCVCNT [11:8] 4 MSBs of Receive Msg. Byte Count
Contents
FCS (CRC) error
Framing Error
Collision during reception
Receive FIFO Overflow
R/W
R/W
R/W
R/W
WO
RO
RO
RO
RO
RO