MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 57

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MT48H32M32LFB5-6 IT:B

Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
Figure 30: Alternating Bank Write Accesses
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
Bank 0
ACTIVE
T0
Row
Row
t CKH
t CMH
t AH
t AH
t AH
t RCD - bank 0
t RAS - bank 0
t RC - bank 0
t RRD
t CK
T1
Note:
NOP
Enable auto precharge
t CMS
t CL
1. For this example, BL = 4.
Column m
t DS
Bank 0
WRITE
T2
D
IN
t CMH
t DH
t CH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
Bank 1
ACTIVE
IN
Row
T4
Row
m + 2
t DH
57
t RCD - bank 1
t DS
D
IN
T5
NOP
m + 3
t DH
t WR - bank 0
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Enable auto precharge
t DS
Column b
1Gb: x32 Mobile LPSDR SDRAM
Bank 1
WRITE
T6
D
IN
t DH
b
t DS
D
T7
IN
NOP
b + 1
t DH
© 2010 Micron Technology, Inc. All rights reserved.
t RP - bank 0
WRITE Operation
t DS
D
T8
IN
NOP
b + 2
t DH
t DS
D
Bank 0
Row
IN
Row
T9
ACTIVE
m + 3
t RCD - bank 0
t WR - bank 1
t DH
Don’t Care

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