MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 79
![no-image](/images/no-image-200.jpg)
MT48H32M32LFB5-6 IT:B
Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
1.MT48H32M32LFB5-6_ITB.pdf
(81 pages)
- Current page: 79 of 81
- Download datasheet (3Mb)
Figure 49: Clock Suspend During READ Burst
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Command
Note:
Internal
Address
clock
CKE
CLK
DQ
1. For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
T0
READ
Bank,
Col n
T1
NOP
T2
NOP
D
OUT
n
79
T3
D
n + 1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
OUT
T4
NOP
1Gb: x32 Mobile LPSDR SDRAM
T5
NOP
D
n + 2
OUT
T6
Don’t Care
NOP
D
n + 3
© 2010 Micron Technology, Inc. All rights reserved.
OUT
Clock Suspend
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