MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 69

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MT48H32M32LFB5-6 IT:B

Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
Command
Figure 42: WRITE Without Auto Precharge
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
BA0, BA1
Address
DQM
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
Bank
ACTIVE
Row
Row
T0
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
Disable auto precharge
1. For this example, BL = 4 and the WRITE burst is followed by a manual PRECHARGE.
t CMS
t CL
Column m
t DS
D
WRITE
Bank
T2
IN
t CMH
t DH
m
t CH
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
IN
T4
NOP
m + 2
t DH
69
t DS
D
IN
NOP
T5
m + 3
t DH
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x32 Mobile LPSDR SDRAM
t WR
NOP
T6
PRECHARGE
Single bank
All banks
PRECHARGE Operation
Bank
T7
© 2010 Micron Technology, Inc. All rights reserved.
t RP
NOP
T8
ACTIVE
Row
Row
Bank
T9
Don’t Care

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