MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 66

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MT48H32M32LFB5-6 IT:B

Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
Figure 38: Single READ Without Auto Precharge
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRE-
Disable auto precharge
t CL
t CMS
CHARGE.
Column m
T2
Bank
READ
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
66
T4
D
NOP
OUT
t OH
t HZ
m
Single bank
Micron Technology, Inc. reserves the right to change products or specifications without notice.
PRECHARGE
All banks
Bank(s)
T5
1Gb: x32 Mobile LPSDR SDRAM
T6
t RP
NOP
PRECHARGE Operation
© 2010 Micron Technology, Inc. All rights reserved.
ACTIVE
Bank
Row
Row
T7
T8
NOP
Don’t Care
Undefined

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