MT48H32M32LFB5-6 IT:B Micron, MT48H32M32LFB5-6 IT:B Datasheet - Page 64

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MT48H32M32LFB5-6 IT:B

Manufacturer Part Number
MT48H32M32LFB5-6 IT:B
Description
Manufacturer
Micron
Datasheet
Figure 36: READ Without Auto Precharge
PDF: 09005aef8404b23d
y68m_mobile_lpsdr.pdf – Rev. D 1/11 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a manual PRE-
Disable auto precharge
t CL
t CMS
CHARGE.
Column m
T2
Bank
READ
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
64
T4
D
NOP
OUT
t OH
t AC
m
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T5
m + 1
D
NOP
OUT
t OH
t AC
1Gb: x32 Mobile LPSDR SDRAM
PRECHARGE
Single bank
All banks
Bank(s)
T6
m + 2
D
OUT
t OH
t RP
PRECHARGE Operation
t AC
© 2010 Micron Technology, Inc. All rights reserved.
T7
NOP
m + 3
D
OUT
t OH
t HZ
Don’t Care
T8
ACTIVE
Row
Bank
Row
Undefined

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