C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 172

• Manufacturer Part Number: C8051T322-GQR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
• Manufacturer: Silicon Labs

Specifications of C8051T322-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051T620/621/320/321/322/323
USB Register Definition 23.13. CMINT: USB0 Common Interrupt
USB Register Address = 0x06
172
Name
Reset
7:4
Bit
Type
3
2
1
0
Bit
RSUINT
SUSINT
RSTINT
Unused
Name
SOF
R
7
0
Unused. Read = 0000b. Write = don’t care.
Start of Frame Interrupt Flag.
Set by hardware when a SOF token is received. This interrupt event is synthesized by
hardware: an interrupt will be generated when hardware expects to receive a SOF
event, even if the actual SOF signal is missed or corrupted.
This bit is cleared when software reads the CMINT register.
0: SOF interrupt inactive.
1: SOF interrupt active.
Reset Interrupt-pending Flag.
Set by hardware when Reset signaling is detected on the bus.
This bit is cleared when software reads the CMINT register.
0: Reset interrupt inactive.
1: Reset interrupt active.
Resume Interrupt-pending Flag.
Set by hardware when Resume signaling is detected on the bus while USB0 is in sus-
pend mode.
This bit is cleared when software reads the CMINT register.
0: Resume interrupt inactive.
1: Resume interrupt active.
Suspend Interrupt-pending Flag.
When Suspend detection is enabled (bit SUSEN in register POWER), this bit is set by
hardware when Suspend signaling is detected on the bus. This bit is cleared when
software reads the CMINT register.
0: Suspend interrupt inactive.
1: Suspend interrupt active.
R
6
0
R
5
0
Rev. 1.1
R
4
0
Function
SOF
R
3
0
RSTINT
R
2
0
RSUINT
R
1
0
SUSINT
R
0
0