C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 6

• Manufacturer Part Number: C8051T322-GQR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
• Manufacturer: Silicon Labs

Specifications of C8051T322-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051T620/621/320/321/322/323
25. UART0 ................................................................................................................... 209
26. UART1 ................................................................................................................... 217
27. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 227
28. Timers ................................................................................................................... 240
6
24.4. Using the SMBus........................................................................................... 191
24.5. SMBus Transfer Modes................................................................................. 201
24.6. SMBus Status Decoding................................................................................ 204
25.1. Enhanced Baud Rate Generation.................................................................. 210
25.2. Operational Modes ........................................................................................ 211
25.3. Multiprocessor Communications ................................................................... 213
26.1. Baud Rate Generator .................................................................................... 217
26.2. Data Format................................................................................................... 218
26.3. Configuration and Operation ......................................................................... 219
27.1. Signal Descriptions........................................................................................ 228
27.2. SPI0 Master Mode Operation ........................................................................ 228
27.3. SPI0 Slave Mode Operation .......................................................................... 230
27.4. SPI0 Interrupt Sources .................................................................................. 231
27.5. Serial Clock Phase and Polarity .................................................................... 231
27.6. SPI Special Function Registers ..................................................................... 233
28.1. Timer 0 and Timer 1 ...................................................................................... 242
24.3.1. Transmitter Vs. Receiver....................................................................... 190
24.3.2. Arbitration.............................................................................................. 190
24.3.3. Clock Low Extension............................................................................. 190
24.3.4. SCL Low Timeout.................................................................................. 190
24.3.5. SCL High (SMBus Free) Timeout ......................................................... 191
24.4.1. SMBus Configuration Register.............................................................. 191
24.4.2. SMB0CN Control Register .................................................................... 195
24.4.3. Hardware Slave Address Recognition .................................................. 197
24.4.4. Data Register ........................................................................................ 200
24.5.1. Write Sequence (Master) ...................................................................... 201
24.5.2. Read Sequence (Master) ...................................................................... 202
24.5.3. Write Sequence (Slave) ........................................................................ 203
24.5.4. Read Sequence (Slave) ........................................................................ 204
25.2.1. 8-Bit UART ............................................................................................ 211
25.2.2. 9-Bit UART ............................................................................................ 212
26.3.1. Data Transmission ................................................................................ 220
26.3.2. Data Reception ..................................................................................... 220
26.3.3. Multiprocessor Communications ........................................................... 221
27.1.1. Master Out, Slave In (MOSI)................................................................. 228
27.1.2. Master In, Slave Out (MISO)................................................................. 228
27.1.3. Serial Clock (SCK) ................................................................................ 228
27.1.4. Slave Select (NSS) ............................................................................... 228
28.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 242
24.4.2.1. Software ACK Generation ............................................................ 195
24.4.2.2. Hardware ACK Generation ........................................................... 195
Rev. 1.1