C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 57

no-image

C8051T322-GQR

Manufacturer Part Number
C8051T322-GQR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T322-GQR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T322-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
10. Voltage Reference Options
The Voltage reference multiplexer for the ADC is configurable to use an externally connected voltage refer-
ence, the on-chip reference voltage generator routed to the VREF pin, the unregulated power supply volt-
age (V
Control register (REF0CN, SFR Definition 10.1) selects the reference source for the ADC. For an external
source or the on-chip reference, REFSL should be set to 0 to select the VREF pin. To use V
erence source, REFSL should be set to 1. To override this selection and use the internal regulator as the
reference source, the REGOVR bit can be set to 1.
The BIASE bit enables the internal voltage bias generator, which is used by many of the analog peripherals
on the device. This bias is automatically enabled when any peripheral which requires it is enabled, and it
does not need to be enabled manually. The bias generator may be enabled manually by writing a 1 to the
BIASE bit in register REF0CN. The electrical specifications for the voltage reference circuit are given in
Table 7.12.
The C8051T620/320/321 devices also include an on-chip voltage reference circuit which consists of a
1.2 V, temperature stable bandgap voltage reference generator and a selectable-gain output buffer ampli-
fier. The buffer is configured for 1x or 2x gain using the REFBGS bit in register REF0CN. On the 1x gain
setting the output voltage is nominally 1.2 V, and on the 2x gain setting the output voltage is nominally
2.4 V. The on-chip voltage reference can be driven on the VREF pin by setting the REFBE bit in register
REF0CN to a 1. The maximum load seen by the VREF pin must be less than 200 µA to GND. Bypass
capacitors of 0.1 µF and 4.7 µF are recommended from the VREF pin to GND, and a minimum of 0.1uF is
required. If the on-chip reference is not used, the REFBE bit should be cleared to 0. Electrical specifica-
tions for the on-chip voltage reference are given in Table 7.12.
Important Note about the VREF Pin: When using either an external voltage reference or the on-chip ref-
erence circuitry, the VREF pin should be configured as an analog pin and skipped by the Digital Crossbar.
Refer to Section “22. Port Input/Output” on page 133 for the location of the VREF pin, as well as details of
how to configure the pin in analog mode and to be skipped by the crossbar.
DD
), or the regulated 1.8 V internal supply (see Figure 10.1). The REFSL bit in the Reference
VDD
GND
Recommended Bypass
4.7F
Figure 10.1. Voltage Reference Functional Block Diagram
R1
Capacitors
+
Reference
External
Voltage
Circuit
0.1F
VREF
C8051T620/621/320/321/322/323
VDD
REF0CN
Rev. 1.1
0
1
Regulator
IOSCEN
Internal
REFBGS
1x/2x
REGOVR
EN
EN
0
1
1.2V Reference
Bias Generator
Temp Sensor
EN
To Analog Mux
VREF
(to ADC)
REFBE
To ADC, IDAC,
Internal Oscillators,
Reference,
TempSensor
DD
as the ref-
57

Related parts for C8051T322-GQR