C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 8

• Manufacturer Part Number: C8051T322-GQR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
• Manufacturer: Silicon Labs

Specifications of C8051T322-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051T620/621/320/321/322/323
List of Figures
8
Figure 1.1. C8051T620/1 Block Diagram ................................................................ 16
Figure 1.2. C8051T320/2 Block Diagram ................................................................ 17
Figure 1.3. C8051T321/3 Block Diagram ................................................................ 18
Figure 1.4. Typical Bus-Powered Connections ....................................................... 19
Figure 3.1. QFN-32 Pinout Diagram (Top View) ..................................................... 24
Figure 3.2. LQFP-32 Pinout Diagram (Top View) .................................................... 25
Figure 3.3. QFN-28 Pinout Diagram (Top View) ..................................................... 26
Figure 4.1. LQFP-32 Package Drawing ................................................................... 27
Figure 4.2. LQFP-32 Recommended PCB Land Pattern ........................................ 28
Figure 5.1. QFN-32 Package Drawing .................................................................... 29
Figure 5.2. QFN-32 Recommended PCB Land Pattern .......................................... 30
Figure 6.1. QFN-28 Package Drawing .................................................................... 31
Figure 6.2. QFN-28 Recommended PCB Land Pattern .......................................... 32
Figure 7.1. Normal Mode Digital Supply Current vs. Frequency (MPCE = 1) ......... 42
Figure 7.2. Idle Mode Digital Supply Current vs. Frequency (MPCE = 1) ............... 42
Figure 8.1. ADC0 Functional Block Diagram ........................................................... 43
Figure 8.2. 10-Bit ADC Track and Conversion Example Timing ............................. 45
Figure 8.3. ADC0 Equivalent Input Circuits ............................................................. 46
Figure 8.4. ADC Window Compare Example: Right-Justified Data ......................... 52
Figure 8.5. ADC Window Compare Example: Left-Justified Data ........................... 52
Figure 8.6. ADC0 Multiplexer Block Diagram .......................................................... 53
Figure 9.1. Temperature Sensor Transfer Function ................................................ 55
Figure 9.2. TOFFH and TOFFL Calibration Value Orientation ................................ 56
Figure 9.3. Temperature Sensor Error with 1-Point Calibration at 0 Celsius ........... 56
Figure 10.1. Voltage Reference Functional Block Diagram ..................................... 57
Figure 11.1. REG0 Configuration: USB Bus-Powered ............................................ 59
Figure 11.2. REG0 Configuration: USB Self-Powered ............................................ 60
Figure 11.3. REG0 Configuration: USB Self-Powered, Regulator Disabled ............ 60
Figure 11.4. REG0 Configuration: No USB Connection .......................................... 61
Figure 12.1. CIP-51 Block Diagram ......................................................................... 64
Figure 14.1. Comparator0 Functional Block Diagram ............................................. 75
Figure 14.2. Comparator1 Functional Block Diagram ............................................. 76
Figure 14.3. Comparator Hysteresis Plot ................................................................ 77
Figure 14.4. Comparator Input Multiplexer Block Diagram ...................................... 82
Figure 15.1. Memory Map ....................................................................................... 85
Figure 15.2. Program Memory Map ......................................................................... 86
Figure 15.3. USB FIFO Space and XRAM Memory Map with USBFAE set to 1 ..... 89
Figure 20.1. Reset Sources ................................................................................... 116
Figure 20.2. Power-On and VDD Monitor Reset Timing ....................................... 117
Figure 21.1. Oscillator Options .............................................................................. 122
Figure 21.2. External Crystal Example .................................................................. 130
Figure 22.1. Port I/O Functional Block Diagram .................................................... 133
Figure 22.2. Port I/O Cell Block Diagram .............................................................. 134
Rev. 1.1