C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 272

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C8051T322-GQR

Manufacturer Part Number
C8051T322-GQR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T322-GQR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T322-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051T620/621/320/321/322/323
A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
29.3.6. 16-Bit Pulse Width Modulator Mode
A PCA module may also be operated in 16-Bit PWM mode. 16-bit PWM mode is independent of the other
(8/9/10/11-bit) PWM modes. In this mode, the 16-bit capture/compare module defines the number of PCA
clocks for the low time of the PWM signal. When the PCA counter matches the module contents, the out-
put on CEXn is asserted high; when the 16-bit counter overflows, CEXn is asserted low. To output a vary-
ing duty cycle, new value writes should be synchronized with PCA CCFn match interrupts. 16-Bit PWM
Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the PCA0CPMn register. For a vary-
ing duty cycle, match interrupts should be enabled (ECCFn = 1 AND MATn = 1) to help synchronize the
capture/compare register writes. If the MATn bit is set to 1, the CCFn flag for the module will be set each
time a 16-bit comparator match (rising edge) occurs. The CF flag in PCA0CN can be used to detect the
overflow (falling edge). The duty cycle for 16-Bit PWM Mode is given by Equation 29.4.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Using Equation 29.4, the largest duty cycle is 100% (PCA0CPn = 0), and the smallest duty cycle is
0.0015% (PCA0CPn = 0xFFFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
272
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
Figure 29.9. PCA 9, 10 and 11-Bit PWM Mode Diagram
W
M
P
1
6
n
0
E
C
O
M
n
PCA0CPMn
C
A
P
P
n
0 0 x 0
C
A
P
N
n
M
A
T
n
O
G
T
n
Equation 29.4. 16-Bit PWM Duty Cycle
W
M
P
n
Duty Cycle
E
C
C
F
n
x
PCA Timebase
ARSEL = 1
ARSEL = 0
R/W when
R/W when
Enable
=
N-bit Comparator
(Capture/Compare)
PCA0CPH:Ln
PCA0CPH:Ln
(right-justified)
(right-justified)
(Auto-Reload)
Rev. 1.1
---------------------------------------------------- -
PCA0H:L
65536 PCA0CPn
65536
Overflow of N
match
th
A
R
S
E
Bit
L
C
O
S
R
PCA0PWM
E
V
x
C
O
V
F
CLR
SET
Q
Q
C
S
E
L
L
1
CEXn
C
L
S
E
L
0
Set “N” bits:
01 = 9 bits
10 = 10 bits
11 = 11 bits
Crossbar
Port I/O

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