C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 88

• Manufacturer Part Number: C8051T322-GQR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
• Manufacturer: Silicon Labs

Specifications of C8051T322-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051T620/621/320/321/322/323
15.2.2. External RAM
There are 1024 bytes of on-chip RAM mapped into the external data memory space. All of these address
locations may be accessed using the external move instruction (MOVX) and the data pointer (DPTR), or
using MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit address operand
(such as @R1), then the high byte of the 16-bit address is provided by the External Memory Interface Con-
trol Register (EMI0CN as shown in SFR Definition 15.1).
For a 16-bit MOVX operation (@DPTR), the upper 6 bits of the 16-bit external data memory address word
are "don't cares" (when USBFAE is cleared to 0). As a result, the 1024-byte RAM is mapped modulo style
over the entire 64 k external data memory address range. For example, the XRAM byte at address 0x0000
is shadowed at addresses 0x0400, 0x0800, 0x0C00, 0x1000, etc. This is a useful feature when performing
a linear memory fill, as the address pointer doesn't have to be reset when reaching the RAM block bound-
ary.
SFR Definition 15.1. EMI0CN: External Memory Interface Control
SFR Address = 0xAA
15.2.3. Accessing USB FIFO Space
The C8051T620/621/320/321/322/323 include 1k of RAM which functions as USB FIFO space.
Figure 15.3 shows an expanded view of the FIFO space and user XRAM. FIFO space is normally
accessed via USB FIFO registers; see Section “23.5. FIFO Management” on page 163 for more informa-
tion on accessing these FIFOs. The MOVX instruction should not be used to load or modify USB data in
the FIFO space.
Unused areas of the USB FIFO space may be used as general purpose XRAM if necessary. The FIFO
block operates on the USB clock domain; thus the USB clock must be active when accessing FIFO space.
Note that the number of SYSCLK cycles required by the MOVX instruction is increased when accessing
USB FIFO space.
To access the FIFO RAM directly using MOVX instructions, the following conditions must be met: (1) the
USBFAE bit in register EMI0CF must be set to '1', and (2) the USB clock frequency must be greater than or
equal to twice the SYSCLK (USBCLK > 2 x SYSCLK). When this bit is set, the USB FIFO space is mapped
88
Name
Reset
7:3
2:0 PGSEL[2:0] XRAM Page Select.
Bit
Type
Bit
Unused
Name
R
7
0
Unused. Read = 00000b; Write = Don’t Care
The EMI0CN register provides the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page
of RAM. Since the upper (unused) bits of the register are always zero, the PGSEL
determines which page of XRAM is accessed.
For Example: If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be
accessed.
R
6
0
R
5
0
Rev. 1.1
R
4
0
Function
R
3
0
R/W
2
0
PGSEL[2:0]
R/W
1
0
R/W
0
0