C8051T322-GQR Silicon Labs, C8051T322-GQR Datasheet - Page 59

• Manufacturer Part Number: C8051T322-GQR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-LQFP32
• Manufacturer: Silicon Labs

Specifications of C8051T322-GQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051T620/621/320/321/322/323
11. Voltage Regulators (REG0 and REG1)
C8051T620/621/320/321/322/323 devices include two internal voltage regulators: one regulates a voltage
source on REGIN to 3.45 V (REG0), and the other regulates the internal core supply to 1.8 V from a V
DD
supply of 1.8 to 3.6 V (REG1). When enabled, the REG0 output appears on the V
pin and can be used
DD
to power external devices. REG0 can be enabled/disabled by software using bit REG0DIS in register
REG01CN (SFR Definition 11.1). REG1 has two power-saving modes built into the regulator to help
reduce current consumption in low-power applications. These modes are accessed through the REG01CN
register. Electrical characteristics for the on-chip regulators are specified in Table 7.5 on page 36.
Note that the VBUS signal must be connected to the VBUS pin when using the device in a USB network.
The VBUS signal should only be connected to the REGIN pin when operating the device as a bus-powered
function. REG0 configuration options are shown in Figure 11.1–Figure 11.4.
11.1. Voltage Regulator (REG0)
11.1.1. Regulator Mode Selection
REG0 offers a low power mode intended for use when the device is in suspend mode. In this low power
mode, the REG0 output remains as specified; however the REG0 dynamic performance (response time) is
degraded. See Table 7.5 for normal and low power mode supply current specifications. The REG0 mode
selection is controlled via the REG0MD bit in register REG01CN.
11.1.2. VBUS Detection
When the USB Function Controller is used (see section Section “23. Universal Serial Bus Controller
(USB0)” on page 155), the VBUS signal should be connected to the VBUS pin. The VBSTAT bit (register
REG01CN) indicates the current logic level of the VBUS signal. If enabled, a VBUS interrupt will be gener-
ated when the VBUS signal has either a falling or rising edge. The VBUS interrupt is edge-sensitive, and
has no associated interrupt pending flag. See Table 7.5 for VBUS input parameters.
Important Note: When USB is selected as a reset source, a system reset will be generated when a falling
or rising edge occurs on the VBUS pin. See Section “20. Reset Sources” on page 116 for details on select-
ing USB as a reset source.
VBUS
VBUS Sense
From VBUS
REGIN
5V In
Voltage Regulator (REG0)
3V Out
To 3 V
VDD
Device
Power Net
Power Net
Figure 11.1. REG0 Configuration: USB Bus-Powered
Rev. 1.1
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