MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1035

Manufacturer Part Number

MPC8544COMEDEV

KIT DEV EXPRESS MPC8544COM

Manufacturer

Freescale Semiconductor

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Figure 17-49

Figure 17-50

This section describes PCI single-beat write transactions, and PCI burst write transactions. A PCI write

transaction starts with the address phase, occurring when an initiator asserts PCI_FRAME. A write

transaction is similar to a read transaction except no turnaround cycle is needed following the address

phase because the initiator provides both address and data. The data phases are the same for both read and

write transactions. Although not shown in the figures, the initiator must drive the PCI_C/BE[3:0] signals,

even if the initiator is not ready to provide valid data (PCI_IRDY negated).

Freescale Semiconductor

illustrates a PCI single-beat read transaction.

illustrates a PCI burst read transaction.

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

PCI Write Transactions

Figure 17-49. PCI Single-Beat Read Transaction

Figure 17-50. PCI Burst Read Transaction

Byte Enables 1

Byte Enables

Byte Enables 2

PCI Bus Interface