MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 829

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.5.3.6.34 Transmit Late Collision Packet Counter (TLCL)
Figure 15-85
Table 15-88
15.5.3.6.35 Transmit Excessive Collision Packet Counter (TXCL)
Figure 15-86
Table 15-89
Freescale Semiconductor
20–31
0–19
Bits
Offset
Reset
Offset
Reset
20–31
0–19
Bits
W
W
R
R
Name
TLCL
0
0
eTSEC1:0x2_4704; eTSEC3:0x2_5704
eTSEC1:0x2_4708; eTSEC3:0x2_5708
describes the fields of the TLCL register.
describes the fields of the TXCL register.
Name
TXCL
describes the definition for the TLCL register.
describes the definition for the TXCL register.
Figure 15-86. Transmit Excessive Collision Packet Counter Register Definition
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
Transmit late collision packet counter. Increments for each frame transmitted which experienced a late
collision during a transmission attempt. Late collisions are defined using the collision window field of the
half-duplex [26:31] register.
Figure 15-85. Transmit Late Collision Packet Counter Register Definition
Reserved
collisions during transmission and was aborted.
Transmit excessive collision packet counter. Increments for each frame that experienced 16
Table 15-89. TXCL Field Descriptions
Table 15-88. TLCL Field Descriptions
All zeros
All zeros
Description
Description
19 20
19 20
Enhanced Three-Speed Ethernet Controllers
TXCL
TLCL
Access: Read/Write
Access: Read/Write
15-97
31
31

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