IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 


Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Page 21
22
Page 22
23
Page 23
24
Page 24
25
Page 25
26
Page 26
27
Page 27
28
Page 28
29
Page 29
30
Page 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
Page 23/104

Download datasheet (2Mb)Embed
PrevNext
5.2 LOW VOLTAGE DETECTOR (LVD)
The on-chip Low Voltage Detector is enabled by
setting a bit in the option bytes (refer to the Option
Bytes section of this document).
The LVD allows the device to be used without any
external RESET circuitry. In this case, the RESET
pin should be left unconnected.
If the LVD is not used, an external circuit is manda-
tory to ensure correct Power On Reset operation,
see figure in the Reset section. For more details,
please refer to the application note AN669.
The LVD generates a static Reset when the supply
voltage is below a reference value. This means
that it secures the power-up as well as the power-
down keeping the ST6 in reset.
The V
reference value for a voltage drop is lower
IT-
than the V
reference value for power-on in order
IT+
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
Figure 12. Low Voltage Detector Reset
V
DD
V
IT+
V
IT-
RESET
ST6208C/ST6209C/ST6210C/ST6220C
The LVD Reset circuitry generates a reset when
V
is below:
DD
– V
when V
is rising
DD
IT+
– V
when V
is falling
DD
IT-
The LVD function is illustrated in
If the LVD is enabled, the MCU can be in only one
of two states:
– Over the input threshold voltage, it is running un-
der full software control
– Below the input threshold voltage, it is in static
safe reset
In these conditions, secure operation is guaran-
teed without the need for external reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
V
hyst
Figure
12.
23/104
1