IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 

Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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Page 37/104

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7 I/O PORTS
7.1 INTRODUCTION
Each I/O port contains up to 8 pins. Each pin can
be programmed independently as digital input
(with or without pull-up and interrupt generation),
digital output (open drain, push-pull) or analog in-
put (when available).
The I/O pins can be used in either standard or al-
ternate function mode.
Standard I/O mode is used for:
– Transfer of data through digital inputs and out-
puts (on specific pins):
– External interrupt generation
Alternate function mode is used for:
– Alternate signal input/output for the on-chip
peripherals
The generic I/O block diagram is shown in
23.
7.2 FUNCTIONAL DESCRIPTION
Each port is associated with 3 registers located in
Data space:
– Data Register (DR)
– Data Direction Register (DDR)
– Option Register (OR)
Each I/O pin may be programmed using the corre-
sponding register bits in the DDR, DR and OR reg-
isters: bit x corresponding to pin x of the port.
9
illustrates the various port configurations which
can be selected by user software.
During MCU initialization, all I/O registers are
cleared and the input mode with pull-up and no in-
terrupt generation is selected for all the pins, thus
avoiding pin conflicts.
7.2.1 Digital Input Modes
The input configuration is selected by clearing the
corresponding DDR register bit.
In this case, reading the DR register returns the
digital value applied to the external I/O pin.
Different input modes can be selected by software
through the DR and OR registers, see
External Interrupt Function
ST6208C/ST6209C/ST6210C/ST6220C
All input lines can be individually connected by
software to the interrupt system by programming
the OR and DR registers accordingly. The inter-
rupt trigger modes (falling edge, rising edge and
low level) can be configured by software for each
port as described in the Interrupt section.
7.2.2 Analog Inputs
Some pins can be configured as analog inputs by
programming the OR and DR registers according-
ly, see
Table
9. These analog inputs are connect-
ed to the on-chip 8-bit Analog to Digital Converter.
Caution: ONLY ONE pin should be programmed
as an analog input at any time, since by selecting
more than one input simultaneously their pins will
be effectively shorted.
7.2.3 Output Modes
Figure
The output configuration is selected by setting the
corresponding DDR register bit. In this case, writ-
ing to the DR register applies this digital value to
the I/O pin through the latch. Then, reading the DR
register returns the previously stored value.
Two different output modes can be selected by
software through the OR register: push-pull and
open-drain.
DR register value and output pin status:
DR
0
Table
1
Note: The open drain setting is not a true open
drain. This means it has the same structure as the
push-pull setting but the P-buffer is deactivated.
To avoid damaging the device, please respect the
V
absolute maximum rating described in the
OUT
Electrical Characteristics section.
7.2.4 Alternate Functions
When an on-chip peripheral is configured to use a
pin, the alternate function (timer input/output...) is
not systematically selected but has to be config-
ured through the DDR, OR and DR registers. Re-
fer to the chapter describing the peripheral for
Table
9.
more details.
Push-pull
Open-drain
V
V
SS
SS
V
Floating
DD
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