IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 

Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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Page 58/104

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ST6208C/ST6209C/ST6210C/ST6220C
INSTRUCTION SET (Cont’d)
Arithmetic and Logic. These instructions are
used to perform arithmetic calculations and logic
operations. In AND, ADD, CP, SUB instructions
one operand is always the accumulator while, de-
pending on the addressing mode, the other can be
Table 18. Arithmetic & Logic Instructions
Instruction
Addressing Mode
ADD A, (X)
Indirect
ADD A, (Y)
Indirect
ADD A, rr
Direct
ADDI A, #N
Immediate
AND A, (X)
Indirect
AND A, (Y)
Indirect
AND A, rr
Direct
ANDI A, #N
Immediate
CLR A
Short Direct
CLR r
Direct
COM A
Inherent
CP A, (X)
Indirect
CP A, (Y)
Indirect
CP A, rr
Direct
CPI A, #N
Immediate
DEC X
Short Direct
DEC Y
Short Direct
DEC V
Short Direct
DEC W
Short Direct
DEC A
Direct
DEC rr
Direct
DEC (X)
Indirect
DEC (Y)
Indirect
INC X
Short Direct
INC Y
Short Direct
INC V
Short Direct
INC W
Short Direct
INC A
Direct
INC rr
Direct
INC (X)
Indirect
INC (Y)
Indirect
RLC A
Inherent
SLA A
Inherent
SUB A, (X)
Indirect
SUB A, (Y)
Indirect
SUB A, rr
Direct
SUBI A, #N
Immediate
Notes:
X,Y
Index Registers
V, W Short Direct Registers
Δ
Affected
58/104
1
either a data space memory location or an imme-
diate value. In CLR, DEC, INC instructions the op-
erand can be any of the 256 data space address-
es. In COM, RLC, SLA the operand is always the
accumulator.
Bytes
Cycles
1
4
1
4
2
4
2
4
1
4
1
4
2
4
2
4
2
4
3
4
1
4
1
4
1
4
2
4
2
4
1
4
1
4
1
4
1
4
2
4
2
4
1
4
1
4
1
4
1
4
1
4
1
4
2
4
2
4
1
4
1
4
1
4
2
4
1
4
1
4
2
4
2
4
# Immediate data (stored in ROM memory)
*
Not Affected
rr Data space register
Flags
Z
C
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
*
*
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
*
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ