IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 

Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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ST6208C/ST6209C/ST6210C/ST6220C
MEMORY MAP (Cont’d)
Table 2. Hardware Register Map
Register
Address
Block
Label
080h
CPU
X,Y,V,W
to 083h
0C0h
DRA
I/O Ports
0C1h
DRB
0C2h
0C3h
0C4h
DDRA
I/O Ports
0C5h
DDRB
0C6h
0C7h
0C8h
CPU
IOR
0C9h
ROM
DRWR
0CAh
0CBh
0CCh
ORA
I/O Ports
0CDh
ORB
0CEh
0CFh
0D0h
ADR
4)
ADC
0D1h
ADCR
0D2h
PSCR
0D3h
Timer1
TCR
0D4h
TSCR
0D5h
to 0D7h
Watchdog
0D8h
WDGR
Timer
0D9h
to 0FEh
0FFh
CPU
A
Legend:
x = undefined, R/W = Read/Write, Ro = Read-only Bit(s) in the register, Wo = Write-only Bit(s)
in the register.
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always be kept at their reset value.
3. Do not use single-bit instructions (SET, RES...) on Port Data Registers if any pin of the port is configured
in input mode (refer to
Section 7 "I/O PORTS" on page 37
4. Depending on device. See device summary on page 1.
12/104
1
Register Name
X,Y index registers
V,W short direct registers
1) 2) 3)
Port A Data Register
1) 2) 3)
Port B Data Register
Reserved (2 Bytes)
2)
Port A Direction Register
2)
Port B Direction Register
Reserved (2 Bytes)
Interrupt Option Register
Data ROM Window register
Reserved (2 Bytes)
2)
Port A Option Register
2)
Port B Option Register
Reserved (2 bytes)
A/D Converter Data Register
A/D Converter Control Register
Timer 1 Prescaler Register
Timer 1 Downcounter Register
Timer 1 Status Control Register
Reserved (3 Bytes)
Watchdog Register
Reserved (38 Bytes)
Accumulator
for more details)
Reset
Remarks
Status
xxh
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
xxh
Write-only
xxh
Write-only
00h
R/W
00h
R/W
xxh
Read-only
40h
Ro/Wo
7Fh
R/W
0FFh
R/W
R/W
00h
0FEh
R/W
xxh
R/W