C8051T611-GM Silicon Laboratories Inc, C8051T611-GM Datasheet - Page 120

IC 8051 MCU 16K BYTE-PROG 28-QFN

C8051T611-GM

Manufacturer Part Number
C8051T611-GM
Description
IC 8051 MCU 16K BYTE-PROG 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Datasheets

Specifications of C8051T611-GM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 21 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1436-5

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T611-GM
Manufacturer:
Silicon Labs
Quantity:
135
Part Number:
C8051T611-GMR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
C8051T611-GMR
Manufacturer:
SILICON LABS/芯科
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C8051T610/1/2/3/4/5/6/7
120
In this example, the crossbar is configured to assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note that the SMBus signals are assigned as a
pair. Additionally, pins P0.0 and P0.3 are configured to be skipped using the XBR0 register.
configuration.
1
2
3
4
All unassigned pins, including those skipped by XBR0 can be used as GPIO or for other non-
crossbar functions.
Pin Number
st
nd
rd
th
TX0 is assigned to P0.4
SYSCLK
SDA and SCL are assigned to P0.2 and P0.3, respectively.
SYSCLK is assigned to P0.6
Function
Figure 21.5. Priority Crossbar Decoder Example 2 - Skipping Pins
RX0 is assigned to P0.5
Pin Skip
These boxes represent the port pins which are used by the peripherals in this
Settings
Special
Signals
CP0A
CP1A
CEX0
CEX1
CEX2
CEX3
CEX4
MISO
MOSI
NSS*
SCK
SDA
RX0
SCL
CP0
CP1
Port
TX0
ECI
T0
T1
0 1 2 3 4 5 6 7
1 0 0 1 0 0 0 0
P0SKIP
P0
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
Rev 1.0
P1SKIP
P1
0 1 2 3 4 5 6 7
0 0 0 0 x x x x
P2SKIP
P2

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