C8051T611-GM Silicon Laboratories Inc, C8051T611-GM Datasheet - Page 65

• Manufacturer Part Number: C8051T611-GM
• Description: IC 8051 MCU 16K BYTE-PROG 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T61xr

Specifications of C8051T611-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051FT610DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 21 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1436-5

12.1. Comparator Multiplexers
C8051T610/1/2/3/4/5/6/7 devices include analog input multiplexers to connect Port I/O pins to the compar-
ator inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 12.5). The
CMX0P1–CMX0P0 bits select the Comparator0 positive input; the CMX0N1–CMX0N0 bits select the
Comparator0 negative input. Likewise, the Comparator1 inputs are selected in the CPT1MX register (SFR
Definition 12.6). Important Note About Comparator Inputs: The Port pins selected as comparator inputs
should be configured as analog inputs in their associated Port configuration register, and configured to be
skipped by the Crossbar (for details on Port configuration, see Section “21.5. Special Function Registers
for Accessing and Configuring Port I/O” on page 124).
P1.0
P1.4
P2.0
P2.4
P1.1
P1.5
P2.1
P2.5
CPT0MX
Figure 12.4. Comparator Input Multiplexer Block Diagram
CP0 +
CP0 -
+
-
VDD
GND
Rev 1.0
P1.2
P1.6
P2.2
P2.6
P1.3
P1.7
P2.3
P2.7
C8051T610/1/2/3/4/5/6/7
CPT1MX
CP1 +
CP1 -
+
-
VDD
GND
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