C8051T611-GM Silicon Laboratories Inc, C8051T611-GM Datasheet - Page 81

• Manufacturer Part Number: C8051T611-GM
• Description: IC 8051 MCU 16K BYTE-PROG 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T61xr

Specifications of C8051T611-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051FT610DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 21 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1436-5

15. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051T610/1/2/3/4/5/6/7's resources and
peripherals. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well
as implementing additional SFRs used to configure and access the sub-systems unique to the
C8051T610/1/2/3/4/5/6/7. This allows the addition of new functionality while retaining compatibility with the
MCS-51™ instruction set. Table 15.1 lists the SFRs implemented in the C8051T610/1/2/3/4/5/6/7 device
family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 15.2, for a detailed description of each register.
Table 15.1. Special Function Register (SFR) Memory Map
F8
F0
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 PCA0CPL3 PCA0CPH3
E0
D8 PCA0CN
D0
C8 TMR2CN
C0 SMB0CN
B8
B0
A8
A0
98
90
88
80
(bit addressable)
SPI0CN
SCON0
TCON
PSW
ACC
0(8)
P3
P2
P1
P0
IP
IE
B
OSCXCN
SPI0CFG
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2 PCA0CPM3 PCA0CPM4
TMR3CN
REF0CN
SMB0CF
CLKSEL
P0MDIN
SBUF0
PCA0L
TMOD
XBR0
1(9)
SP
TMR2RLL TMR2RLH
SMB0DAT ADC0GTL ADC0GTH
TMR3RLL TMR3RLH
SPI0CKR
CPT1CN
P1MDIN
OSCICN
EMI0CN
PCA0H
XBR1
DPL
2(A)
TL0
PCA0CPL0 PCA0CPH0 PCA0CPL4 PCA0CPH4
SPI0DAT
CPT0CN
P2MDIN
OSCICL
AMX0P
DPH
3(B)
TL1
Rev 1.0
P0MDOUT P1MDOUT P2MDOUT P3MDOUT
C8051T610/1/2/3/4/5/6/7
CPT1MD
ADC0CF
P3MDIN
P0SKIP
IT01CF
TMR2L
TMR3L
TH0
4(C)
ADC0LTL
CPT0MD
P1SKIP
TMR2H
TMR3H
ADC0L
TOFFL
TH1
5(D)
ADC0LTH
CPT1MX
CKCON
P2SKIP
ADC0H
TOFFH
EIP1
EIE1
6(E)
VDM0CN
RSTSRC
REG0CN
CPT0MX
PCON
7(F)
81