C8051T611-GM Silicon Laboratories Inc, C8051T611-GM Datasheet - Page 4

• Manufacturer Part Number: C8051T611-GM
• Description: IC 8051 MCU 16K BYTE-PROG 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T61xr

Specifications of C8051T611-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051FT610DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 21 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1436-5

C8051T610/1/2/3/4/5/6/7
17. EPROM Memory ..................................................................................................... 94
18. Power Management Modes................................................................................... 97
19. Reset Sources ...................................................................................................... 100
20. Oscillators and Clock Selection ......................................................................... 106
21. Port Input/Output ................................................................................................. 113
22. SMBus................................................................................................................... 132
4
16.2. Interrupt Register Descriptions ........................................................................ 87
16.3. External Interrupts INT0 and INT1................................................................... 92
17.1. Programming and Reading the EPROM Memory ........................................... 94
17.2. Security Options .............................................................................................. 95
17.3. Program Memory CRC .................................................................................... 96
18.1. Idle Mode......................................................................................................... 97
18.2. Stop Mode ....................................................................................................... 98
19.1. Power-On Reset ............................................................................................ 101
19.2. Power-Fail Reset/VDD Monitor ..................................................................... 102
19.3. External Reset ............................................................................................... 103
19.4. Missing Clock Detector Reset ....................................................................... 103
19.5. Comparator0 Reset ....................................................................................... 104
19.6. PCA Watchdog Timer Reset ......................................................................... 104
19.7. EPROM Error Reset ...................................................................................... 104
19.8. Software Reset .............................................................................................. 104
20.1. System Clock Selection................................................................................. 106
20.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 108
20.3. External Oscillator Drive Circuit..................................................................... 110
21.1. Port I/O Modes of Operation.......................................................................... 114
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 116
21.3. Priority Crossbar Decoder ............................................................................. 117
21.4. Port I/O Initialization ...................................................................................... 121
21.5. Special Function Registers for Accessing and Configuring Port I/O ............. 124
22.1. Supporting Documents .................................................................................. 133
22.2. SMBus Configuration..................................................................................... 133
22.3. SMBus Operation .......................................................................................... 133
17.1.1. EPROM Write Procedure ........................................................................ 94
17.1.2. EPROM Read Procedure........................................................................ 95
17.3.1. Performing 32-bit CRCs on Full EPROM Content .................................. 96
17.3.2. Performing 16-bit CRCs on 256-Byte EPROM Blocks............................ 96
20.3.1. External RC Example............................................................................ 112
20.3.2. External Capacitor Example.................................................................. 112
21.1.1. Port Pins Configured for Analog I/O...................................................... 114
21.1.2. Port Pins Configured For Digital I/O...................................................... 114
21.1.3. Interfacing Port I/O to 5V Logic ............................................................. 115
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 116
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 116
21.2.3. Assigning Port I/O Pins to INT0 or INT1 external interrupts.................. 117
22.3.1. Transmitter Vs. Receiver....................................................................... 134
Rev 1.0