MCR908JK1ECPE Freescale Semiconductor, MCR908JK1ECPE Datasheet - Page 101

• Manufacturer Part Number: MCR908JK1ECPE
• Description: IC MCU 1.5K FLASH 8MHZ 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JK1ECPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 14
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC08JK
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

ADCO — ADC Continuous Conversion Bit
ADCH[4:0] — ADC Channel Select Bits
Freescale Semiconductor
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is allowed when this bit is cleared. Reset clears the ADCO bit.
ADCH[4:0] form a 5-bit field which is used to select one of the ADC channels. The five channel select
bits are detailed in the following table. Care should be taken when using a port pin as both an analog
and a digital input simultaneously to prevent switching noise from corrupting the analog signal.
The ADC subsystem is turned off when the channel select bits are all set to one. This feature allows
for reduced power consumption for the MCU when the ADC is not used. Reset sets all of these bits to
a 1.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH4
1. If any unused channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used to verify the
operation of the ADC converter both in production test and for user applications.
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
:
Recovery from the disabled state requires one conversion cycle to stabilize.
ADCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
:
ADCH2
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
1
1
:
MC68HC908JL3E Family Data Sheet, Rev. 4
Table 9-1. MUX Channel Select
ADCH1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
:
NOTE
ADCH0
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
:
ADC Channel
ADC10
ADC11
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
—
—
—
ADC power off
Input Select
(see Note 1)
(see Note 2)
(see Note 2)
Reserved
Unused
Unused
PTB0
PTB1
PTB2
PTB3
PTB4
PTB5
PTB6
PTB7
PTD3
PTD2
PTD1
PTD0
V
V
DDA
SSA
I/O Registers
101