MCR908JK1ECPE Freescale Semiconductor, MCR908JK1ECPE Datasheet - Page 75

• Manufacturer Part Number: MCR908JK1ECPE
• Description: IC MCU 1.5K FLASH 8MHZ 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JK1ECPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 14
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC08JK
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Table 7-2
When the host computer has completed downloading code into the MCU RAM, the host then sends a
RUN command, which executes an RTI, which sends control to the address on the stack pointer.
7.3.2 Baud Rate
The communication baud rate is dependant on oscillator frequency. The state of PTB3 also affects baud
rate if entry to monitor mode is by IRQ = V
pin is at logic zero upon entry into monitor mode, the divide by ratio is 512.
Freescale Semiconductor
is a summary of the vector differences between user mode and monitor mode.
Monitor
Modes
1. If the high voltage (V
User
Blank reset vector,
its COP enable output. The COP is a mask option enabled or disabled by the COPD bit
in the configuration register.
Monitor Mode
IRQ = V
IRQ = V
Entry By:
Disabled
Enabled
TST
DD
COP
Table 7-2. Monitor Mode Vector Differences
Table 7-3. Monitor Baud Rate Selection
(1)
MC68HC908JL3E Family Data Sheet, Rev. 4
TST
Vector
$FFFE
$FEFE
Reset
) is removed from the IRQ pin or the RST pin, the SIM asserts
High
Input Clock
4.9152 MHz
9.8304 MHz
4.9152 MHz
9.8304 MHz
4.9152 MHz
Frequency
TST
. When PTB3 is high, the divide by ratio is 1024. If the PTB3
Vector
$FFFF
$FEFF
Reset
Low
Functions
Vector
$FFFC
$FEFC
Break
High
PTB3
X
X
0
1
1
Vector
$FFFD
$FEFD
Break
Low
Baud Rate
$FEFC
9600 bps
9600 bps
4800 bps
9600 bps
4800 bps
Vector
$FFFC
High
SWI
Vector
$FFFD
$FEFD
Functional Description
Low
SWI
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