MCR908JK1ECPE Freescale Semiconductor, MCR908JK1ECPE Datasheet - Page 23

• Manufacturer Part Number: MCR908JK1ECPE
• Description: IC MCU 1.5K FLASH 8MHZ 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JK1ECPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 14
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC08JK
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$000C
$000D
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000E
$0019
Addr.
↓
↓
↓
Port A Input Pull-up Enable
Data Direction Register D
Data Direction Register A
Data Direction Register B
Port D Control Register
Register Name
Port A Data Register
Port B Data Register
Port D Data Register
Register (PTAPUE)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 4)
(DDRD)
(DDRA)
(DDRB)
(PDCR)
(PTD)
(PTA)
(PTB)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908JL3E Family Data Sheet, Rev. 4
PTA6EN
DDRB7
DDRD7
PTD7
PTB7
Bit 7
0
0
0
0
0
0
0
0
= Unimplemented
PTAPUE6
DDRA6
DDRB6
DDRD6
PTD6
PTA6
PTB6
6
0
0
0
0
0
0
PTAPUE5
DDRA5
DDRB5
DDRD5
PTD5
PTA5
PTB5
5
0
0
0
0
0
0
PTAPUE4
DDRA4
DDRB4
DDRD4
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTA4
PTB4
PTD4
4
0
0
0
0
0
0
PTAPUE3
SLOWD7
DDRA3
DDRB3
DDRD3
PTA3
PTB3
PTD3
R
3
0
0
0
0
0
= Reserved
PTAPUE2
SLOWD6
DDRD2
DDRA2
DDRB2
PTA2
PTB2
PTD2
2
0
0
0
0
0
PTAPUE1
PTDPU7
DDRD1
DDRA1
DDRB1
PTA1
PTB1
PTD1
1
0
0
0
0
0
Monitor ROM
PTAPUE0
PTDPU6
DDRA0
DDRD0
DDRB0
PTA0
PTB0
PTD0
Bit 0
0
0
0
0
0
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