MCR908JK1ECPE Freescale Semiconductor, MCR908JK1ECPE Datasheet - Page 98

• Manufacturer Part Number: MCR908JK1ECPE
• Description: IC MCU 1.5K FLASH 8MHZ 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JK1ECPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 14
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC08JK
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Analog-to-Digital Converter (ADC)
9.3.1 ADC Port I/O Pins
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are shared with the ADC channels. The
channel select bits (ADC status and control register, $003C), define which ADC channel/port pin will be
used as the input signal. The ADC overrides the port I/O by forcing that pin as input to the ADC. The
remaining ADC channels/port pins are controlled by the port I/O and can be used as general-purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin that is selected by the ADC. Read
of a port pin which is in use by the ADC will return a 0 if the corresponding DDR bit is at 0. If the DDR bit
is at 1, the value in the port data latch is read.
98
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
CONVERSION
COMPLETE
RESET
MC68HC908JL3E Family Data Sheet, Rev. 4
ADIV[2:0]
ADC DATA REGISTER
Figure 9-2. ADC Block Diagram
GENERATOR
CLOCK
ADC
ADC CLOCK
ADICLK
DDRBx/DDRDx
PTBx/PTDx
ADC VOLTAGE IN
ADCVIN
DISABLE
(1 OF 12 CHANNELS)
DISABLE
CHANNEL
SELECT
ADC CHANNEL x
Freescale Semiconductor
ADCx
ADCH[4:0]