MCR908JK1ECPE Freescale Semiconductor, MCR908JK1ECPE Datasheet - Page 76

• Manufacturer Part Number: MCR908JK1ECPE
• Description: IC MCU 1.5K FLASH 8MHZ 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCR908JK1ECPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 14
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC08JK
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Monitor ROM (MON)
7.3.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See
The data transmit and receive rate can be anywhere from 4800 baud to 28.8k-baud. Transmit and receive
baud rates must be identical.
7.3.4 Echoing
As shown in
for error checking.
Any result of a command appears after the echo of the last byte of the command.
7.3.5 Break Signal
A start bit followed by nine low bits is a break signal. (See Figure 7-6.) When the monitor receives a break
signal, it drives the PTB0 pin high for the duration of two bits before echoing the break signal.
76
Figure 7-3
Figure
BREAK
SENT TO
MONITOR
$A5
and
ECHO
START
BIT
7-5, the monitor ROM immediately echoes each received byte back to the PTB0 pin
START
START
Figure
0
BIT
BIT
BIT 0
1
READ
BIT 0
BIT 0
7-4.)
2
MISSING STOP BIT
BIT 1
Figure 7-4. Sample Monitor Waveforms
3
MC68HC908JL3E Family Data Sheet, Rev. 4
BIT 1
BIT 1
Figure 7-3. Monitor Data Format
4
READ
Figure 7-6. Break Transaction
BIT 2
Figure 7-5. Read Transaction
5
BIT 2
BIT 2
6
BIT 3
ADDR. HIGH
7
BIT 3
BIT 3
BIT 4
BIT 4
BIT 4
ADDR. HIGH ADDR. LOW
BIT 5
BIT 5
BIT 5
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
BIT 6
0
BIT 6
BIT 6
1
BIT 7
2
BIT 7
BIT 7
ADDR. LOW
3
STOP
BIT
STOP
STOP
4
BIT
BIT
START
NEXT
5
BIT
START
START
NEXT
NEXT
BIT
BIT
6
RESULT
DATA
Freescale Semiconductor
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