UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1269

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

UF0EPS0
UF0E0W register
UF0E0N register
UF0IS1
EP0NKW bit of
UF0EPS0
E0INDT
UF0E0W register
UF0E0N register
EP0W
UF0IS1
EP0NKW bit of
E0INDT
Status of
EP0W
register
register
bit of
bit of
Status of
register
register
bit of
bit of
Writing
starts
FIFO
(b) When Null packet or short packet is transmitted
FIFO FW
CHAPTER 22 USB FUNCTION CONTROLLER (USBF)
clear
completed
Figure 22-6. Operation of UF0E0W Register
mission
Trans-
Writing
starts
Transmission
FIFO
16-byte transfer
starts
Transfer of Null packet
FIFO full
(a) 16-byte transmission
User’s Manual U19601EJ2V0UD
E0DED bit of
UF0DEND
register is set.
completed
mission
Trans-
completed
mission
Trans-
reception
ACK
reception
ACK
Hardware
clear
Hardware
clear
INT clear
(FW clear)
INT clear
(FW clear)
Hardware
clear
Hardware
clear
Writing
starts
FIFO
Writing
16-byte transfer
starts
FIFO
completed
mission
Trans-
Writing
Transmission
starts
Short packet transfer
FIFO
completed
starts
Writing
Hardware clear
FIFO
completed
mission
Trans-
FIFO full
Hardware clear
E0DED bit of
UF0DEND
register is set.
cannot be
received
ACK
completed ACK
mission
Trans-
Re-transfer
reloaded
Counter
mission
trans-
starts
Re-
reception
reception
ACK
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