UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 855

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) CSIEn control register 2 (CEnCTL2)
The CEnCTL2 register is used to select the transfer data length of CSIEn.
These registers can be read or written in 8-bit or 1-bit units.
The CEnCTL2 register may be transferring data when the CEnCTL0.CEnTXE bit or CEnRXE bit is 1. Be sure
to clear the CEnTXE and CEnRXE bits to 0 before writing data to the CEnCTL2 register.
Reset sets this register to 00H.
CEnCTL2
(n = 0, 1)
After reset: 00H
CHAPTER 18 CLOCKED SERIAL INTERFACE E WITH FIFO (CSIE)
Caution Be sure to clear bits 7 to 4 to “0”. If they are set to 1, the
CEnDLS3 CEnDLS2 CEnDLS1 CEnDLS0
Other than above
• If a transfer data length other than 16 bits is specified (CEnDLS3 to CEnDLS0 bits
= 0000), an undefined value is read to the higher excess bits of the CEnRX0 and
CSIBUFn registers (see 18.6 (3) Data transfer direction specification function).
0
1
1
1
1
1
1
1
1
0
operation is not guaranteed.
R/W
0
0
0
0
0
0
1
1
1
×
Address: CE0CTL2 FFFFFB09H, CE1CTL2 FFFFFB49H
User’s Manual U19601EJ2V0UD
0
0
0
1
1
0
0
1
×
0
0
0
0
1
0
1
0
1
0
×
CEnDLS3 CEnDLS2 CEnDLS1 CEnDLS0
8 bits
9 bits
10 bits
11 bits
12 bits
13 bits
14 bits
15 bits
16 bits
Setting prohibited
Specification of transfer bit length
853