UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1560

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1558
Maskable
Type
Note
Remarks 1. Default Priority: The priority order when two or more maskable interrupt requests occur at the same
Classification Default
Interrupt
μ
PD70F3783 only
2. The execution address of the illegal instruction when an illegal opcode exception occurs is calculated
Restored PC:
nextPC:
by (Restored PC − 4).
Priority
100
101
102
103
104
105
106
107
108
110
111
112
113
97
98
99
CHAPTER 25 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Table 25-2. V850ES/JH3-E Interrupt/Exception Sources (5/5)
INTRTC1
INTRTC2
INTUSBF0
INTUSBF1
INTETMRX
INTETMTX
INTETMRQ
INTETMFS
INTETMTS
INTETMRS
INTETMOV
INTETBER
INTC0ERR
INTC0WUP1
INTC0REC
INTC0TRX
Name
time. The highest priority is 0.
The priority order of non-maskable interrupt is INTWDT2 > NMI.
The value of the program counter (PC) saved to EIPC, FEPC, or DBPC when
interrupt servicing is started. Note, however, that the restored PC when a non-
maskable or maskable interrupt is acknowledged while one of the following
instructions is being executed does not become the nextPC (if an interrupt is
acknowledged during interrupt execution, execution stops, and then resumes after
the interrupt servicing has finished).
• Load instructions (SLD.B, SLD.BU, SLD.H, SLD.HU, SLD.W)
• Division instructions (DIV, DIVH, DIVU, DIVHU)
• PREPARE, DISPOSE instructions (only if an interrupt is generated before the
The PC value that starts the processing following interrupt/exception processing.
stack pointer is updated)
Note
Note
Note
Note
RTC alarm match
RTC interval signal
USBF interrupt
USBF resume interrupt
Packet reception
Packet transmission
Reception packet read
request
FIFO status
Transmission status
Reception status
Statistics counter overflow
Error interrupt
CAN0 error
CAN0 wakeup
CAN0 reception
CAN0 transmission
User’s Manual U19601EJ2V0UD
Trigger
Note
Note
Note
Note
RTC
RTC
USBF
USBF
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
CAN0
CAN0
CAN0
CAN0
Generating
Ethernet
Ethernet
Unit
0690H
06A0H
06B0H
06C0H
06D0H
06E0H
06F0H
0700H
0710H
0720H
0730H
0740H
0760H
0770H
0780H
0790H
Exception
Code
00000690H
000006A0H
000006B0H
000006C0H
000006D0H
000006E0H
000006F0H
00000700H
00000710H
00000720H
00000730H
00000740H
00000760H
00000770H
00000780H
00000790H
Address
Handler
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
Restored
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
PC
RTC1IC
RTC2IC
UFIC0
UFIC1
ETMRXIC
ETMTXIC
ETMRQIC
ETMFSIC
ETMTSIC
ETMRSIC
ETMOVIC
ETBERIC
ERRIC0
WUPIC0
RECIC0
TRXIC0
Interrupt
Register
Control
Note
Note
Note
Note