UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 833

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.6.10 Receive data noise filter
as the input data. Therefore, data not exceeding 2 clock width is judged to be noise and is not delivered to the internal
circuit (see Figure 17-18). See 17.7 (1) (a) Base clock regarding the base clock.
delayed by 3 clocks in relation to the external signal status.
Base clock (f
This filter samples the RXDCn pin using the base clock of the prescaler output.
When the same sampling value is read twice, the match detector output changes and the RXDCn signal is sampled
Moreover, since the circuit is as shown in Figure 17-17, the processing that goes on within the receive operation is
Internal signal C
Internal signal A
Internal signal B
RXDCn (input)
Remark
Remark
Base clock
RXDCn
UCLK
)
n = 0 to 5 (V850ES/JH3-E)
n = 0 to 7 (V850ES/JJ3-E)
n = 0 to 5 (V850ES/JH3-E)
n = 0 to 7 (V850ES/JJ3-E)
In
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
Q
Figure 17-21. Timing of RXDCn Signal Judged as Noise
Internal signal A
Figure 17-20. Noise Filter Circuit
Match
User’s Manual U19601EJ2V0UD
In
(judged as noise)
Q
Mismatch
Internal signal B
detector
Match
Match
In
LD_EN
Q
(judged as noise)
Internal signal C
Mismatch
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