MC9S08DZ60MLC Freescale Semiconductor, MC9S08DZ60MLC Datasheet - Page 51

• Manufacturer Part Number: MC9S08DZ60MLC
• Description: IC MCU 60K FLASH 4K RAM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DZ60MLC

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• For Use With: DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
2
0x18AF
0x18B0
0x18B1
0x18B2
0x18B3
0x18B4 –
0x18BB
0x18BC
0x18BD
0xFFAE
0xFFAF
0xFFB0–
0xFFB7
0xFFBC
0xFFBD
0xFFBE
0xFFBF
Nonvolatile Flash registers, shown in
an 8-byte backdoor key, NVBACKKEY, which can be used to gain access to secure memory resources.
During reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the Flash
memory are transferred into corresponding FPROT and FOPT working registers in the high-page registers
to control security and block protection options.
0xFFB8–
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the Flash if needed (normally through the background
debug interface) and verifying that Flash is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC) to the unsecured state (1:0).
Freescale Semiconductor
Address
SRR and IDE are both 1s.
The position of RTR differs between extended and standard identifier mapping.
Table 4-4. MSCAN Foreground Receive and Transmit Buffer Layouts — Extended Mapping Shown
CANRTSRL
CANTIDR0
CANTIDR1
CANTIDR2
CANTIDR3
CANTDSR0 –
CANTDSR7
CANTDLR
CANTTBPR
Reserved for
storage of FTRIM
Res. for storage of
MCGTRM
NVBACKKEY
Reserved
NVPROT
Reserved
NVOPT
Register Name
KEYEN
PRIO7
TSR7
Bit 7
ID10
DB7
ID2
—
—
—
—
—
—
0
Table 4-5. Nonvolatile Register Summary
EPS
MC9S08DZ60 Series Data Sheet, Rev. 4
FNORED EPGMOD
PRIO6
TSR6
Table
DB6
ID9
ID1
—
—
—
—
—
—
6
0
4-5, are located in the Flash memory. These registers include
PRIO5
TSR5
DB5
ID8
ID0
—
—
—
—
—
—
5
0
8-Byte Comparison Key
PRIO4
TSR4
RTR
DB4
ID7
—
—
—
—
—
—
4
0
0
TRIM
PRIO3
TSR3
DLC3
DB3
IDE
ID6
—
—
—
—
—
3
0
0
FPS
PRIO2
TSR2
DLC2
DB2
ID5
—
—
—
—
—
—
2
0
0
PRIO1
DLC1
TSR1
DB1
ID4
—
—
—
—
—
—
1
0
Chapter 4 Memory
SEC
FTRIM
PRIO0
TSR0
DLC0
Bit 0
DB0
ID3
—
—
—
—
—
—
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