MC9S08DZ60MLC Freescale Semiconductor, MC9S08DZ60MLC Datasheet - Page 84

• Manufacturer Part Number: MC9S08DZ60MLC
• Description: IC MCU 60K FLASH 4K RAM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DZ60MLC

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• For Use With: DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 5 Resets, Interrupts, and General System Control
5.8.8
This register is used to report the status of the low-voltage warning function, and to configure the stop
mode behavior of the MCU. This register should be written during the user’s reset initialization program
to set the desired controls even if the desired settings are the same as the reset settings.
84
1
2
Any other Reset:
Power-on Reset:
PPDACK
This bit can be written only one time after power-on reset. Additional writes are ignored.
This bit can be written only one time after reset. Additional writes are ignored.
PPDC
LVWV
PPDF
Field
LVDV
LVD Reset:
5
4
3
2
0
System Power Management Status and Control 2 Register
(SPMSC2)
Figure 5-10. System Power Management Status and Control 2 Register (SPMSC2)
Low-Voltage Detect Voltage Select — This write-once bit selects the low-voltage detect (LVD) trip point setting.
It also selects the warning voltage range. See
Low-Voltage Warning Voltage Select — This bit selects the low-voltage warning (LVW) trip point voltage. See
Table
Partial Power Down Flag — This read-only status bit indicates that the MCU has recovered from stop2 mode.
0 MCU has not recovered from stop2 mode.
1 MCU recovered from stop2 mode.
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Partial Power Down Control — This write-once bit controls whether stop2 or stop3 mode is selected.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
W
R
1
5-12.
See Electrical Characteristics appendix for minimum and maximum values.
0
7
0
0
0
LVDV:LVWV
0:0
0:1
1:0
1:1
= Unimplemented or Reserved
Table 5-12. LVD and LVW Trip Point Typical Values
Table 5-11. SPMSC2 Register Field Descriptions
0
0
0
0
6
MC9S08DZ60 Series Data Sheet, Rev. 4
LVDV
0
u
u
5
LVW Trip Point
V
V
V
V
LVW0
LVW1
1
LVW2
LVW3
= 2.74 V
= 2.92 V
= 4.3 V
= 4.6 V
LVWV
Table
u
4
0
u
Description
5-12.
PPDF
0
0
0
3
LVD Trip Point
V
V
LVD0
LVD1
u = Unaffected by reset
PPDACK
= 2.56 V
= 4.0 V
0
0
0
0
2
1
Freescale Semiconductor
0
0
0
0
1
PPDC
0
0
0
0
2