ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 141

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ST10F272B_12

Manufacturer Part Number
ST10F272B_12
Description
16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
ST10F272B/ST10F272E
Table 67.
24.7.1
Analog Switch Resistance
A/D converter characteristics
1. V
2. V
3. Not 100% tested, guaranteed by design characterization.
4. During the sample time the input capacitance C
5. This parameter includes the sample time t
6. DNL, INL, OFS and TUE are tested at V
7. The coupling factor is measured on a channel while an overload condition occurs on the adjacent not
8. Refer to scheme reported in
Conversion timing control
When a conversion is started, first the capacitances of the converter are loaded via the
respective analog input pin to the current analog input voltage. The time to load the
capacitances is referred to as sample time. Next the sampled voltage is converted to a
digital value several successive steps, which correspond to the 10-bit resolution of the ADC.
During these steps the internal capacitances are repeatedly charged and discharged via the
V
The current that has to be drawn from the sources for sampling and changing charges
depends on the time that each respective step takes, because the capacitors must reach
their final voltage level within the given time, at least with a certain approximation. The
maximum current, however, that a source can deliver, depends on its internal resistance.
The time that the two different actions during conversion take (sampling, and converting)
can be programmed within a certain range in the ST10F272 relative to the CPU clock. The
absolute time that is consumed by the different conversion steps therefore is independent
from the general speed of the controller. This allows adjusting the A/D converter of the
ST10F272 to the properties of the system:
Parameter
AREF
main V
maintain the V
setting bit ADOFF in ADCON register.
these cases will be 0x000
internal resistance of the analog source must allow the capacitance to reach its final voltage level within t
After the end of the sample time t
result.
Values for the sample clock t
programming.
the result register with the conversion result. Values for the conversion clock t
and can be taken from next
characterization for all other voltages within the defined voltage range.
‘LSB’ has a value of V
For Port5 channels, the specified TUE (± 2LSB) is guaranteed also with an overload condition (see I
specification) occurring on maximum 2 not selected analog input pins of Port5 and the absolute sum of
input overload currents on all Port5 analog input pins does not exceed 10 mA.
For Port1 channels, the specified TUE is guaranteed when no overload condition is applied to Port1 pins:
when an overload condition occurs on maximum 2 not selected analog input pins of Port1 and the input
positive overload current on all analog input pins does not exceed 10 mA (either dynamic or static
injection), the specified TUE is degraded (± 7LSB). To get the same accuracy, the negative injection
current on Port1 pins shall not exceed -1mA in case of both dynamic and static injection.
selected channels with the overload current within the different specified ranges (for both positive and
negative injection current).
AREF
AIN
pin.
may exceed V
can be tied to ground when A/D Converter is not in use: an extra consumption (around 200
DD
is added due to internal analogue circuitry not completely turned off: so, it is suggested to
3) 8)
AREF
AGND
at V
AREF
DD
or V
H
R
R
level even when not in use, and eventually switch off the A/D Converter circuitry
/1024.
SW
AD
or 0x3FF
Symbol
Table
Figure
S
AREF
depends on programming and can be taken from
CC
CC
S
Doc ID 11917 Rev 3
68.
, changes of the analog input voltage have no effect on the conversion
up to the absolute maximum ratings. However, the conversion result in
39.
H
, respectively.
AREF
S
, the time for determining the digital result and the time to load
min.
= 5.0 V, V
AIN
Limit Values
can be charged/discharged by the external source. The
AGND
600
1600
1300
max.
= 0V, V
DD
W
W
= 5.0 V. It is guaranteed by design
Unit
Electrical characteristics
CC
Table 68: A/D converter
depend on programming
Port5
Port1
Test Condition
μ
A) on
OV
141/188
S
.

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