ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 164

• Manufacturer Part Number: ST10F272B_12
• Description: 16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Electrical characteristics
24.8.16
Table 78.
164/188
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
22
23
25
27
38
Symbol
CC
CC
CC
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
CC
Multiplexed bus
V
ALE cycle time = 6 TCL + 2t
Multiplexed bus timings
ALE high time
Address setup to ALE
Address hold after ALE
ALE falling edge to RD, WR
(with RW-delay)
ALE falling edge to RD, WR
(no RW-delay)
Address float after RD, WR
(with
Address float after RD, WR
(no
RD, WR low time
(with RW-delay)
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address/Unlatched CS to valid
data in
Data hold after RD
rising edge
Data float after
Data valid to WR
Data hold after WR
ALE rising edge after RD, WR
Address/Unlatched CS hold
after RD, WR
ALE falling edge to Latched CS
(no RW-delay)
(with RW-delay)
(no RW-delay)
DD
RW-delay)1
= 5V ± 10%, V
RW-delay)1
Parameter
RD1
SS
= 0V, T
A
A
– 8.5 + t
+ t
15.5 + t
Doc ID 11917 Rev 3
1.5 + t
– 4 – t
28 + t
10 + t
= –40 to +125°C, CL = 50pF,
15 + t
10 + t
4 + t
4 + t
4 + t
4 + t
min.
C
F
–
–
–
–
–
–
0
–
TCL = 12.5 ns
+ t
CPU
A
A
A
F
C
C
F
F
A
A
C
F
A
= 40 MHz
(75ns at 40MHz CPU clock without wait states)
20 + 2t
18.5 + t
16.5 + t
+ t
10 – t
17.5 +
6 + t
max.
18.5
+ t
A
–
–
–
–
–
6
–
–
–
–
–
–
–
+ t
C
C
A
A
C
C
F
+
2TCL – 9.5 + t
3TCL – 9.5 + t
2TCL – 8.5 + t
2TCL – 15 + t
2TCL – 10 + t
2TCL – 15 + t
TCL – 8.5 + t
TCL – 8.5 + t
TCL – 8.5 + t
TCL – 11 + t
– 8.5 + t
– 4 – t
min.
1/2 TCL = 1 to 64MHz
Variable CPU Clock
–
–
–
–
–
–
0
–
A
A
A
A
A
A
C
F
F
C
C
ST10F272B/ST10F272E
F
2TCL – 8.5 + t
2TCL – 19 + t
3TCL – 19 + t
3TCL – 20 +
4TCL – 30 +
+ 2t
TCL + 6
+ t
10 – t
max.
A
A
–
–
–
–
–
6
–
–
–
–
–
–
–
+ t
+ t
A
C
C
C
C
F
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns