ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 151

• Manufacturer Part Number: ST10F272B_12
• Description: 16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST10F272B/ST10F272E
24.8
24.8.1
Note:
Note:
24.8.2
AC characteristics
Test waveforms
Figure 42. Input / output waveforms
AC inputs during testing are driven at 2.4V for a logic ‘1’ and 0.4V for a logic ‘0’.
Timing measurements are made at V
Figure 43. Float waveforms
For timing purposes a port pin is no longer floating when V
It begins to float when a 100mV change from the loaded V
20mA).
Definition of internal timing
The internal operation of the ST10F272 is controlled by the internal CPU clock f
edges of the CPU clock can trigger internal (for example pipeline) or external (for example
bus cycles) operations.
The specification of the external timing (AC Characteristics) therefore depends on the time
between two consecutive edges of the CPU clock, called “TCL”.
The CPU clock signal can be generated by different mechanisms. The duration of TCL and
its variation (and also the derived external timing) depends on the mechanism used to
generate f
This influence must be regarded when calculating the timings for the ST10F272.
The example for PLL operation shown in
CPU
.
Doc ID 11917 Rev 3
IH
min. for a logic ‘1’ and V
Figure 44
refers to a PLL factor of 4.
OH
LOAD
/V
OL
IL
changes of ±100mV.
Electrical characteristics
max for a logic ‘0’.
level occurs (I
CPU
OH
/I
. Both
OL
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