ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 152

• Manufacturer Part Number: ST10F272B_12
• Description: 16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Electrical characteristics
24.8.3
152/188
The mechanism used to generate the CPU clock is selected during reset by the logic levels
on pins P0.15-13 (P0H.7-5).
Figure 44. Generation mechanisms for the CPU clock
Clock generation modes
Table 69
mode.
Table 69.
1. The external clock input range refers to a CPU clock range of 1...64 MHz. Besides, the PLL usage is limited
2. The maximum depends on the duty cycle of the external clock signal: when 64MHz is used, 50% duty cycle
1
1
1
1
0
0
0
0
to 4-8MHz. All configurations need a crystal (or ceramic resonator) to generate the CPU clock through the
internal oscillator amplifier (apart from Direct Drive): vice versa, the clock can be forced through an external
clock source only in Direct Drive mode (on-chip oscillator amplifier disabled, so no crystal or resonator can
be used).
shall be granted (low phase = high phase = 7.8ns); when 32MHz is selected a 25% duty cycle can be
(P0H.7-5)
P0.15-13
associates the combinations of these three bits with the respective clock generation
1
1
0
0
1
1
0
0
On-chip clock generator selections
1
0
1
0
1
0
1
0
CPU Frequency
f
CPU
F
F
F
F
F
F
F
F
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
= f
XTAL
Doc ID 11917 Rev 3
x 10
x 16
x 4
x 3
x 8
x 5
x 1
/ 2
x F
External Clock Input
5.3 to 8MHz
6.4 to 8MHz
4 to 6.4MHz
1 to 64MHz
Range
4 to 8MHz
4 to 8MHz
4 to 8MHz
4MHz
1) 3)
Default configuration
Direct Drive (oscillator
bypassed)
CPU clock via prescaler
ST10F272B/ST10F272E
2)
Notes
3)