ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 146

• Manufacturer Part Number: ST10F272B_12
• Description: 16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Electrical characteristics
146/188
(sampled voltage on C
must be designed to respect the following relation:
Equation 1
The formula above provides a constraints for external network design, in particular on
resistive path.
A second aspect involving the capacitance network shall be considered. Assuming the three
capacitances C
equivalent circuit reported in
close), a charge sharing phenomena is installed.
Figure 40. Charge sharing timing diagram during sampling phase
In particular two different transient periods can be distinguished (see
●
Equation 2
●
Equation 3
A first and quick charge transfer from the internal capacitance C
sampling capacitance C
considering a worst case (since the time constant in reality would be faster) in which
C
are in series, and the time constant is:
This relation can again be simplified considering only C
condition. In reality, the transient is faster, but the A/D Converter circuitry has been
designed to be robust also in the very worst case: the sampling time T
longer than the internal time constant:
P2
is reported in parallel to C
F
, C
P1
and C
S
) and the sum of R
V A
τ 1
P2
S
Figure
⋅
<
Doc ID 11917 Rev 3
R S
----------------------------------------------------------------------------- -
occurs (C
initially charged at the source voltage V
(
τ 1
R SW
+
=
P1
R F
39), when the sampling phase is started (A/D switch
(
R SW
(call C
+
+
R AD
S
R L
R EQ
is supposed initially completely discharged):
S
+
+
P
+ R
)
R AD
R SW
⋅
= C
C S
F
)
P1
+ R
< <
⋅
+
---------------------- -
C P
C P C S
+ C
R AD
L
T
+
+ R
⋅
P2
S
C S
<
), the two capacitance C
SW
1
-- - LSB
2
S
as an additional worst
+ R
AD
ST10F272B/ST10F272E
, the external circuit
P1
Figure
A
and C
(refer to the
S
is always much
40):
P2
to the
P
and C
S