ST10F272B_12 STMICROELECTRONICS [STMicroelectronics], ST10F272B_12 Datasheet - Page 170

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ST10F272B_12

Manufacturer Part Number
ST10F272B_12
Description
16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Electrical characteristics
24.8.17
Table 79.
170/188
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
80
81
12
13
14
15
16
17
18
20
21
22
24
26
28
28h
Symbol
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
CC
ALE high time
Address setup to ALE
Address/Unlatched CS setup
to RD, WR
(with RW-delay)
Address/Unlatched CS setup
to RD, WR
(no RW-delay)
RD, WR low time
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address/Unlatched CS to
valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
Data valid to WR
Data hold after WR
ALE rising edge after RD,
WR
Address/Unlatched CS hold
after RD, WR
Address/Unlatched CS hold
after WRH
Demultiplexed bus
V
ALE cycle time = 4 TCL + 2t
Demultiplexed bus timings
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
DD
= 5V ± 10%, V
Parameter
2
1
31
SS
= 0V, T
A
12.5 + 2t
0.5 + 2t
15.5 + t
A
–10 + t
1.5 + t
– 5 + t
28 + t
10 + t
+ t
Doc ID 11917 Rev 3
4 + t
4 + t
0 + t
min.
= –40 to +125°C, CL = 50pF,
F
0
C
TCL = 12.5 ns
CPU
A
F
F
+ t
C
C
A
F
F
A
C
A
F
= 40 MHz
(50ns at 40MHz CPU clock without wait states).
17.5 + t
20 + 2t
18.5 + t
16.5 + t
6 + t
4 + t
max.
+ t
+ t
C
C
C
F
A
A
C
F
+
+
2TCL – 9.5 + t
3TCL – 9.5 + t
TCL – 12 + 2t
2TCL – 15 + t
TCL – 8.5 + t
2TCL – 12.5 +
TCL – 8.5 + t
TCL – 11 + t
–10 + t
– 5 + t
0 + t
+ 2t
min.
1/2 TCL = 1 to 64MHz
Variable CPU Clock
0
A
F
F
F
A
A
F
A
C
C
C
ST10F272B/ST10F272E
2TCL – 19 + t
3TCL – 19 + t
2TCL – 8.5 +
3TCL – 20 +
4TCL – 30 +
TCL – 8.5 +
+ 2t
+ t
+ t
+ t
max.
F
F
A
A
+ 2t
+ 2t
+ t
+ t
C
A
A
C
C
C
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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