HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 218

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

detection and DACK active low) (Single address mode, bus cycle = Address/data multiplex
detection and DACK active low) (Dual address mode, bus cycle = Address/data multiplex
Note:
Figure 9.21 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Figure 9.22 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Bus cycle
Bus cycle
DREQ
DREQ
DACK
DACK
When DREQ is negated at the fourth state of the DMAC cycle, the next DMA transfer
will be executed because the sampling is done at the second state of the DMAC cycle.
Note: When DREQ is negated at the fourth state of the DMAC cycle, the next DMA
transfer will be executed because the sampling is done at the second state of the
DMAC cycle.
CK
CK
CPU
CPU
CPU
CPU
CPU
CPU
T1
DMAC(R)
I/O bus cycle)
I/O bus cycle)
T2
T1
T3
T2
DMAC
T4
T3
DMAC
(W)
T4
CPU
CPU
DMAC (W): DMAC write cycle
DMAC (R): DMAC read cycle
T1
DMAC (R)
T1
T2
T3
T2
DMAC
T4
T3
DMAC
T4
(W)
HITACHI 203
CPU
CPU