HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 295

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HD6417021

Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
10.5
The ITU has two interrupt sources: input capture/compare match and overflow.
10.5.1
Timing for Setting IMFA and IMFB in a Compare Match: The IMF bits of the TSR are set to
1 by a compare match signal generated when the TCNT matches a general register. The compare
match signal is generated in the last state in which the values match (when the TCNT is updated
from the matching count to the next count). Therefore, when the TCNT matches the GRA or GRB,
the compare match signal is not generated until the next timer clock input. Figure 10.54 shows the
timing of setting the IMF bits.
match signal
input clock
Compare
Interrupts
Timing of Setting Status Flags
TCNT
TCNT
Figure 10.54 Timing of Setting Compare Match Flags (IMFA, IMFB)
IMF
GR
CK
IMI
N
N
N + 1
HITACHI 281

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