HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 86

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HD6417021

Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
5.3.2
ICR is a 16-bit register that sets the input detection mode of the external interrupt input pins NMI
and IRQ0–IRQ7 and indicates the input signal level to the NMI pin. A reset initializes ICR but the
standby mode does not.
Note: When NMI input is high: 1; when NMI input is low: 0
• Bit 15 (NMI input level (NMIL)): NMIL sets the level of the signal input at the NMI pin.
Bit 15: NMIL
0
1
• Bits 14–9 (reserved): These bits always read as 0. The write value should always be 0.
• Bit 8 (NMI edge select (NMIE)): NMIE selects whether the falling or rising edge of the
Bit 8: NMIE
0
1
Bits 7–0 (IRQ0–IRQ7 sense select (IRQ0S–IRQ7S)): IRQ0–IRQ7 select whether the falling edge or
low level of the IRQ inputs is sensed at the pins IRQ0–IRQ7.
Bits 7–0: IRQ0S–IRQ7S
0
1
NMIL cannot be modified. The NMI input level can be read to determine the NMI pin level.
interrupt request signal to the NMI pin is sensed.
Initial value:
Initial value:
Bit name:
Bit name:
Interrupt Control Register (ICR)
R/W:
R/W:
Bit:
Bit:
IRQ0S
NMIL
R/W
15
R
7
0
*
Description
NMI input level is low
NMI input level is high
Description
Interrupt is requested on falling edge of NMI input (initial value)
Interrupt is requested on rising edge of NMI input
Description
Interrupt is requested when IRQ input is low (initial value)
Interrupt is requested on falling edge of IRQ input
IRQ1S
R/W
14
0
6
0
IRQ2S
R/W
13
0
5
0
IRQ3S
R/W
12
0
4
0
IRQ4S
R/W
11
0
3
0
IRQ5S
R/W
10
0
2
0
IRQ6S
R/W
9
0
1
0
HITACHI 69
IRQ7S
NMIE
R/W
R/W
8
0
0
0

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