HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 402

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

Receiving Serial Data (clocked synchronous mode): Figure 13.18 shows a sample flowchart for
receiving serial data. When switching from the asynchronous mode to the clocked synchronous
mode, make sure that ORER, PER, and FER are cleared to 0. If PER or FER is set to 1, the RDRF
bit will not be set and both transmitting and receiving will be disabled. Figure 13.19 shows an
example of SCI recieve operation.
The procedure for recieving serial data is listed below.
1. SCI initialization: select the RxD pin function with the PFC.
2. Receive error handling: if a receive error occurs, read the ORER bit in SSR to identify the
error. After executing the necessary error handling, clear ORER to 0. Transmitting/receiving
Figure 13.17 Sample Flowchart for Serial Transmitting
Write transmit data in TDR and
clear TDRE bit to 0 in SSR
Read TDRE bit in SSR
Read TEND bit in SSR
Clear TE bit SCR to 0
All data transmitted?
Transmission ends
Start transmitting
TDRE = 1?
TEND = 1?
Initialize
Yes
Yes
Yes
No
No
No
(1)
(2)
(3)
HITACHI 389