HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 403

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HD6417021

Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
3. SCI status check and receive data read: read the serial status register (SSR), check that RDRF
4. To continue receiving serial data: read RDR, and clear RDRF to 0 before the frame MSB (bit
HITACHI 390
cannot resume if ORER remains set to 1.
is set to 1, then read receive data from the receive data register (RDR) and clear RDRF to 0.
The RXI interrupt can also be used to determine if the RDRF bit has changed from 0 to 1.
7) of the current frame is received. If the DMAC is started by a receive-data-full interrupt
(RXI) to read RDR, the RDRF bit is cleared automatically so this step is unnecessary.
Figure 13.18 Sample Flowchart for Serial Receiving
No
No
and clear the SSR's RDRF bit to 0
Clear the RE bit of the SCR to 0
Read the ORER bit of the SSR
Read the RDR's receive data
Read RDRF bit of the SSR
Total count received?
Reception ends
Start receiving
Initialization
ORER = 1?
RDRF = 1?
No
Yes
Yes
Error handling
Yes
(1)
(3)
(4)
(2)

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